Hui Zhao
F297C Discovery Park
Computer Science and Engineering
University of North Texas
Denton, TX 76203, USA
Email: hui dot zhao AT unt dot edu
Ph.D. Penn State University
F297C Discovery Park
Computer Science and Engineering
University of North Texas
Denton, TX 76203, USA
Email: hui dot zhao AT unt dot edu
Ph.D. Penn State University
Teaching
Spring 2020 - Networks-on-Chip, CSE 5615.
Fall 2019 - Assembly Language and Computer Organization, CSE 2610.
Spring 2019 - Networks-on-Chip, CSE 5615.
Fall 2018 - Assembly Language and Computer Organization, CSE 2610.
Spring 2018 - Topics in Computer Science and Engineering: Network-on-Chip, CSE 5933.
Fall 2017 - Computer System Architecture, CSE 5610.
Spring 2017 - Topics in Computer Science and Engineering: Network-on-Chip, CSE 5933.
Fall 2016 - Computer System Architecture, CSE 5610.
Spring 2020 - Networks-on-Chip, CSE 5615.
Fall 2019 - Assembly Language and Computer Organization, CSE 2610.
Spring 2019 - Networks-on-Chip, CSE 5615.
Fall 2018 - Assembly Language and Computer Organization, CSE 2610.
Spring 2018 - Topics in Computer Science and Engineering: Network-on-Chip, CSE 5933.
Fall 2017 - Computer System Architecture, CSE 5610.
Spring 2017 - Topics in Computer Science and Engineering: Network-on-Chip, CSE 5933.
Fall 2016 - Computer System Architecture, CSE 5610.
Research
Alleviating Bottlenecks for DNN Execution on GPUs via Opportunistic Computing. ISQED 2020.
Xianwei Cheng, Hui Zhao, Mahmut Kandemir, Saraju Mohanty, Beilei Jiang.
Dynamic block size adjustment and workload balancing strategy based on CPU-GPU heterogeneous platform. ISPA 2019.
Juan Fang, Kuan Zhou, Hui Zhao.
A Low-Cost and Energy-Efficient NoC Architecture for GPGPUs. ACM/IEEE ANCS 2019.
Xianwei Cheng, Yang Zhao, Mohammadreza Robaei, Beilei Jiang, Hui Zhao, Juan Fang.
A Congestion-adaptive Fault-tolerant Routing Algorithm on HNoC. IEEE CYBER 2019.
Juan Fang, Yanjin Cheng and Hui Zhao.
Computing with Near Data. SIGMETRICS 2019.
Xulong Tang, Mahmut Taylan Kandemir, Hui Zhao, Myoungsoo Jung, and Mustafa Karakoy.
Improving GPU NoC Power Efficiency through Dynamic Bandwidth Allocation. ICCE 2019.
Xianwei Cheng, Hui Zhao, Saraju P. Mohanty and Juan Fang.
Exploration of System Configuration in Effective Training of CNNs on GPGPUs. ICCE 2019.
Li Zhang, Xianwei Cheng, Hui Zhao, Saraju P. Mohanty and Juan Fang.
Designing Scalable Hybrid Wireless NoC for GPGPUs. ISVLSI 2018.
H. Zhao, X. Cheng, S. P. Mohanty and J. Fang.
Exploration on Routing Configuration of HNoC with Reasonable Energy Consumption. ISVLSI 2018.
J. Fang, Z. Chang, Y. Cheng, and H. Zhao.
Packet Pump: Overcoming Network Bottleneck in On-Chip Interconnects for GPGPUs. DAC 2018.
Xianwei Cheng, Yang Zhao, Hui Zhao, Yuan Xie.
DEMM: A Dynamic Energy-Saving Mechanism for Multicore Memories. MASCOTS 2017: 210-220.
Akbar Sharifi, Wei Ding, Diana Guttman, Hui Zhao, Xulong Tang, Mahmut T. Kandemir, Chita R. Das.
Summary of the 2015 NIST Language Recognition i-Vector Machine Learning Challenge.
A. Tong, C. Greenberg, A. Martin, D. Banse, H. Zhao, G. Doddington, D. Garcia-Romero, A. McCree, D. Reynolds, E. Singer, J. Hernandez-Cordero and L. Mason. ODYSSEY 2016.
Results of The 2015 NIST Language Recognition Evaluation.
H. Zhao, D. Banse, G. Doddington, C. Greenberg, J. Hernandez-Cordero, J. Howard, L. Mason, A. Martin, D. Reynolds, E. Singer, A. Tong. INTERSPEECH 2016.
Phase Detection with Hidden Markov Models for DVFS on Many-Core Processors.
J. Booth, J. Kotra, H. Zhao, M. Kandemir, P. Raghravan, T. Abdelzaher. ICDCS 2015.
Memory Row Reuse Distance and its Role in Optimizing Application Performance.
M. Kandemir, H. Zhao, X. Tang, M. Karakoy. SIGMETRICS 2015.
Taper:Tackling Power Emergencies in the Dark Silicon Era by Exploiting Resource Scalability.
H. Zhao, M. Kandemir, M. J. Irwin. COMPUTING FRONTIER 2015.
A hybrid NoC design for cache coherence optimization for chip multiprocessors.
H. Zhao, O. Jang, W. Ding, Y. Zhang, M. T. Kandemir, M. J. Irwin. DAC 2012
Exploring heterogeneous NoC design space.
H. Zhao, M. T. Kandemir, W. Ding, M. J. Irwin. ICCAD 2011: 787-793
Feedback control based cache reliability enhancement for emerging multicores.
H. Zhao, A. Sharifi, S. Srikantaiah, M. T. Kandemir. ICCAD 2011.
Exploring Performance-Power Tradeoffs in Providing Reliability for NoC-Based MPSoCs.
H. Zhao, M. Kandemir, M. J. Irwin. ISQED 2011.
A special-purpose compiler for look-up table and code generation for function Evaluation.
Y. Zhang, L. Deng, P. Yedlapalli, S. Prashanth Muralidhara, H. Zhao, M. T. Kandemir, C. Chakrabarti, N. Pitsianis, X. Sun. DATE 2010.
Feedback control for providing QoS in NoC based multicores.
A. Sharifi, H. Zhao, M. T. Kandemir. DATE 2010.
Alleviating Bottlenecks for DNN Execution on GPUs via Opportunistic Computing. ISQED 2020.
Xianwei Cheng, Hui Zhao, Mahmut Kandemir, Saraju Mohanty, Beilei Jiang.
Dynamic block size adjustment and workload balancing strategy based on CPU-GPU heterogeneous platform. ISPA 2019.
Juan Fang, Kuan Zhou, Hui Zhao.
A Low-Cost and Energy-Efficient NoC Architecture for GPGPUs. ACM/IEEE ANCS 2019.
Xianwei Cheng, Yang Zhao, Mohammadreza Robaei, Beilei Jiang, Hui Zhao, Juan Fang.
A Congestion-adaptive Fault-tolerant Routing Algorithm on HNoC. IEEE CYBER 2019.
Juan Fang, Yanjin Cheng and Hui Zhao.
Computing with Near Data. SIGMETRICS 2019.
Xulong Tang, Mahmut Taylan Kandemir, Hui Zhao, Myoungsoo Jung, and Mustafa Karakoy.
Improving GPU NoC Power Efficiency through Dynamic Bandwidth Allocation. ICCE 2019.
Xianwei Cheng, Hui Zhao, Saraju P. Mohanty and Juan Fang.
Exploration of System Configuration in Effective Training of CNNs on GPGPUs. ICCE 2019.
Li Zhang, Xianwei Cheng, Hui Zhao, Saraju P. Mohanty and Juan Fang.
Designing Scalable Hybrid Wireless NoC for GPGPUs. ISVLSI 2018.
H. Zhao, X. Cheng, S. P. Mohanty and J. Fang.
Exploration on Routing Configuration of HNoC with Reasonable Energy Consumption. ISVLSI 2018.
J. Fang, Z. Chang, Y. Cheng, and H. Zhao.
Packet Pump: Overcoming Network Bottleneck in On-Chip Interconnects for GPGPUs. DAC 2018.
Xianwei Cheng, Yang Zhao, Hui Zhao, Yuan Xie.
DEMM: A Dynamic Energy-Saving Mechanism for Multicore Memories. MASCOTS 2017: 210-220.
Akbar Sharifi, Wei Ding, Diana Guttman, Hui Zhao, Xulong Tang, Mahmut T. Kandemir, Chita R. Das.
Summary of the 2015 NIST Language Recognition i-Vector Machine Learning Challenge.
A. Tong, C. Greenberg, A. Martin, D. Banse, H. Zhao, G. Doddington, D. Garcia-Romero, A. McCree, D. Reynolds, E. Singer, J. Hernandez-Cordero and L. Mason. ODYSSEY 2016.
Results of The 2015 NIST Language Recognition Evaluation.
H. Zhao, D. Banse, G. Doddington, C. Greenberg, J. Hernandez-Cordero, J. Howard, L. Mason, A. Martin, D. Reynolds, E. Singer, A. Tong. INTERSPEECH 2016.
Phase Detection with Hidden Markov Models for DVFS on Many-Core Processors.
J. Booth, J. Kotra, H. Zhao, M. Kandemir, P. Raghravan, T. Abdelzaher. ICDCS 2015.
Memory Row Reuse Distance and its Role in Optimizing Application Performance.
M. Kandemir, H. Zhao, X. Tang, M. Karakoy. SIGMETRICS 2015.
Taper:Tackling Power Emergencies in the Dark Silicon Era by Exploiting Resource Scalability.
H. Zhao, M. Kandemir, M. J. Irwin. COMPUTING FRONTIER 2015.
A hybrid NoC design for cache coherence optimization for chip multiprocessors.
H. Zhao, O. Jang, W. Ding, Y. Zhang, M. T. Kandemir, M. J. Irwin. DAC 2012
Exploring heterogeneous NoC design space.
H. Zhao, M. T. Kandemir, W. Ding, M. J. Irwin. ICCAD 2011: 787-793
Feedback control based cache reliability enhancement for emerging multicores.
H. Zhao, A. Sharifi, S. Srikantaiah, M. T. Kandemir. ICCAD 2011.
Exploring Performance-Power Tradeoffs in Providing Reliability for NoC-Based MPSoCs.
H. Zhao, M. Kandemir, M. J. Irwin. ISQED 2011.
A special-purpose compiler for look-up table and code generation for function Evaluation.
Y. Zhang, L. Deng, P. Yedlapalli, S. Prashanth Muralidhara, H. Zhao, M. T. Kandemir, C. Chakrabarti, N. Pitsianis, X. Sun. DATE 2010.
Feedback control for providing QoS in NoC based multicores.
A. Sharifi, H. Zhao, M. T. Kandemir. DATE 2010.
News
| Research assistant positions are available for highly motivated Ph.D students to join our group. |
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2/2024 Our paper about GPU NoC architecture for ML is accepted by DAC WIP 2024. 8/2023 Siamak Biglari and Ruixiao Huang joined our lab as Ph.D. Students. 6/2023 Our paper on GPU Genomics Analysis Benchmark is accepted by ISPASS 2023. 3/2022 Two papers are accepted to ISVLSI. 8/2021 Khoa Ho joined our Lab as a Ph.D. student. 1/2021 Dr Zhao received the NSF CAREER award. 8/2020 Shouzhe Zhang joined our Lab as a PhD student. 4/2020 Our paper "AMOEBA: A Coarse Grained Reconfigurable Architecture for Dynamic GPU Scaling" is accepted by the premier high-performance computing systems conference, the 34th International Conference on Supercomputing (ICS 2020). 2/2020 Our paper "Alleviating Bottlenecks for DNN Execution on GPUs via Opportunistic Computing" won the Best Paper Award in the 21st International Symposium on Quality Electronic Design (ISQED 2020). 12/2019 Our paper on CPU-GPU heterogeneous computing is accepted by ISPA 2019. 9/2019 Our paper "A Low-Cost and Energy-Efficient NoC Architecture for GPGPUs" is accepted by the The ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS 2019 Acceptance Rate=24%). 8/2019 Zhuren Liu joined our group as a PhD student. 7/2019 Our paper "A Congestion-adaptive Fault-tolerant Routing Algorithm on HNoC" is accepted by the The IEEE-CYBER 2019. 1/2019 Yuwen Cui joined our group as a PhD student. 10/2018 Dr. Zhao attended the NSF CSR PI meeting. She received the travel grant as an aspiring PI. 10/2018 Juan Ruiz and Nicholus Tindle joined our group as undergraduate students. They will work on a project to investigate unsafe area using a drone and Jetson2. 9/2018 Our paper will appear in the proceedings of the 37th IEEE ICCE. Congratualations to Xianwei and Li. 6/2018 Li Zhang joined our group as a Master's student. 5/2018 Dr. Zhao attended the NSF CSR Aspring PI workshop. She received the travel grant to attend the workshop. 4/2018 Our paper will appear in proceedings of ISVLSI 2018. 2/2018 Our paper "Packet Pump: Overcoming Network Bottleneck in On-Chip Interconnects for GPGPUs" is accepted by the premier Design Automation Conference (DAC 2018 Acceptance Rate=23%). 8/2017 Xianwei Cheng joined our group as a PhD student. 8/2016 Dr. Zhao started as an assistant professor at the CSE department of UNT |
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Brief Bio
Dr. Zhao is an Assistant Professor at University of North Texas in the Computer Science and Engineering department. She is the PI of Lab for Accelerated Computer ARChitectures (LARC).
Her research interests are multi-core and GPU accelerated computing systems, including Network-on-Chips, memory systmes and heterogeneous computing. She is currently investigating hardware accelerator designs for Deep Neural Networks, including GPUs and FPGAs.
She received her BS and MSEE degree from Harbin Institute of Technology and Northeastern University respectively. She received her Ph.D degree from the Pennsylvania State University. She also has a lot of industry experience working as a hardware engineer before joining the academia.
Her research interests are multi-core and GPU accelerated computing systems, including Network-on-Chips, memory systmes and heterogeneous computing. She is currently investigating hardware accelerator designs for Deep Neural Networks, including GPUs and FPGAs.
She received her BS and MSEE degree from Harbin Institute of Technology and Northeastern University respectively. She received her Ph.D degree from the Pennsylvania State University. She also has a lot of industry experience working as a hardware engineer before joining the academia.
